1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to the improvement of a metal oxide semiconductor (MOS) output circuit.
2. Description of the Related Art
In a MOS memory device such as a dynamic random access memory (DRAM), a prior art output circuit is formed by two MOS transistors in series between a positive potential power supply V.sub.cc such as 5 V or 3.3 V and a ground potential power supply V.sub.ss (=0 V). When two input signals at two input nodes are supplied to gates of the respective MOS transistors, an output signal is obtained at an output node between the MOS transistors in accordance with the input signals. In this case, if the output signal is too low or high, an off-state of one of the two transistors is changed to ON. Particularly, as a result, if minority carriers are generated, data stored in memory cells may be destroyed. In order to avoid this, an additional MOS transistor is provided between one of the input nodes and the output node.
However, there are actually a plurality of output circuits in a MOS memory device. As a result, one output circuit may be erroneously operated by the operation of the other output circuits. This will be explained later in detail.